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STRUCTURE
SILICON MONOLITHIC INTEGRATED CIRCUIT
FUNCTION PRODUCT SERIES
OUTPUT FULL SWING CMOS OPERATIONAL AMPLIFIER
BU7421G BU7421SG
Low power supply voltage operation(1.7[V]5.5[V]) Wide operating temperature range(BU7421S-40[]105[]) Slew Rate(0.05[V/us] typ.) Low supply current(8.5[A] typ.) Low power supply voltage operation(1[pA] typ.)
FEATURES
ABSOLUTE MAXIMUM RATINGS(Ta=25[])
Parameter Supply Voltage Power dissipation Differential Input Voltage(*3) Input Common-mode Voltage Range Operating Temperature range Topr Storage Temperature Range Maximum junction Temperature Tstg Tjmax Symbol VDD-VSS Pd Vid Vicm BU7421 BU7421S Rating 7 540(*1)(*2) VDD-VSS (VSS-0.3)VDD+0.3 -40+85 -40+105 -55+125 +125 Unit V mW V V
This IC is not designed for protection against radioactive rays. (*1) To use at temperature above Ta25[] reduce 5.4[mW]. (*2) Mounted on a glass epoxy PCB(70[mm]x70[mm]x1.6[mm]). (*3) The voltage difference between inverting input and non-inverting input is the differential input voltage. Then input terminal voltage is set to more than VSS.
OPERATING CONDITION (BU7421G:Ta=-40[]+85[] BU7421SG:Ta=-40[]+105[])
Parameter Supply Voltage Symbol VDD Rating 1.75.5 (Single Supply) Unit V
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ELECTRICAL CHARACTERISTICS (unless otherwise specified VDD=+3[V]VSS=0[V])
Parameter Input offset voltage (*4)(*6) Input offset current (*4) Input bias current (*4) Supply current(*6) IDD High level output voltage Low level output voltage Large signal voltage gain Input common mode voltage Common mode rejection ratio Power supply rejection ratio Output source current (*5) Output sink current (*5) Slew rate Gain band width Phase margin VOH VOL AV Vicm CMRR PSRR IOH IOL SR FT Symbol Vio Iio Ib
Temperature range
Guaranteed Limit Min. VDD-0.1 70 0 45 60 2 4 Typ. 1 1 1 8.5 100 60 80 4 8 0.05 90 60 Max. 6 17 25 VSS+0.1 1.8 -
Unit mV pA pA A V V dB V dB dB mA mA V/s kHz VDD-0.4[V] VSS+0.4[V] CL=25[pF]
Condition
25 25 25 25 Full range 25 25 25 25 25 25 25 25 25 25 25
RL= All Op-Amps AV=0[dB],VIN=0.9[V] RL=10[k] RL=10[k] RL=10[k] VSSVDD-1.2[V]
CL=25[pF],AV=40[dB] CL=25[pF],AV=40[dB]
(*4) Absolute value (*5) Reference to power dissipation under the high temperature environment and decide the output current. Continuous short circuit is occurring the degenerate of output current characteristics. (*6) Full range BU7421:-40[]+85[] BU7421S:-40[]+105[]
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Physical Dimensions
BU7421G(SSOP5) (Unit[mm])
BU7421SG(SSOP5) (Unit[mm])
Block diagram
Pin No.Pin Name Pin No. 1 2 3 4 5 Pin Name IN+ VSS INOUT VDD
IN+ VSS IN-
1 2 3
G:SSOP5
5

VDD
4
OUT
Application example (1) Absolute maximum ratings Absolute maximum ratings are the values which indicate the limits, within which the given voltage range can be safely charged to the terminal. However, it does not guarantee the circuit operation. (2) Applied voltage to the input terminal For normal circuit operation of operational amplifier, please input voltage for its input terminal within input common mode voltage VDD+0.3[V]. Then, regardless of power supply voltage,VSS-0.3[V] can be applied to input terminals without deterioration or destruction of its characteristics. (3) Operating power supply (split power supply/single power supply) The operational amplifier operates if a given level of voltage is applied between VDD and VSS. Therefore, the operational amplifier can be operated under single power supply or split power supply. (4) Power dissipation (pd) If the IC is used under excessive power dissipation. An increase in the chip temperature will cause deterioration of the radical characteristics of IC. For example, reduction of current capability. Take consideration of the effective power dissipation and thermal design with a sufficient margin. Pd is reference to the provided power dissipation curve. (5) Short circuits between pins and incorrect mounting Short circuits between pins and incorrect mounting when mounting the IC on a printed circuits board, take notice of the direction and positioning of the IC. If IC is mounted erroneously, It may be damaged. Also, when a foreign object is inserted between output, between output and VDD terminal or VSS terminal which causes short circuit, the IC may be damaged.
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(6) Output short circuit If short circuit occurs between the output terminal and VDD terminal, excessive in output current may flow and generate heat, causing destruction of the IC. Take due care. (7) Using under strong electromagnetic field Be careful when using the IC under strong electromagnetic field because it may malfunction. (8) Usage of IC When stress is applied to the IC through warp of the printed circuit board, The characteristics may fluctuate due to the piezo effect. Be careful of the warp of the printed circuit board. (9) Testing IC on the set board When testing IC on the set board, in cases where the capacitor is connected to the low impedance, make sure to discharge per fabrication because there is a possibility that IC may be damaged by stress. When removing IC from the set board, it is essential to cut supply voltage. As a countermeasure against the static electricity, observe proper grounding during fabrication process and take due care when carrying and storage it. (10) The IC destruction caused by capacitive load The transistors in circuits may be damaged when VDD terminal and VSS terminal is shorted with the charged output terminal capacitor. When IC is used as a operational amplifier or as an application circuit, where oscillation is not activated by an output capacitor,the output capacitor must be kept below 0.1[F] in order to prevent the damage mentioned above. (11) Decupling capacitor Insert the decupling capacitance between VDD and VSS, for stable operation of operational amplifier. (12) Latch up Be careful of input voltage that exceed the VDD and VSS. When CMOS device have sometimes occur latch up operation. And protect the IC from abnormaly noise
(13) Crossorver distortion Inverting amplifier is generete crossover distortion when feed back resistance value is small. To supress the crosover distortion, connect a resistor between the output terminal and VSS Then increse the bias current to enable class A output stage operation.
Feed back resistance
VDD
+
VSS
Pull down resistance
1.Pull down resistance
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Notice
Notes
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